A flash memory device is generally known as a type of a nonvolatile semiconductor memory device and may include a tunnel oxide layer, a floating gate, a dielectric layer and a control gate.
The flash memory device may be programmed by injecting electrons into the floating gate while applying a predetermined voltage to the control gate. The dielectric layer may transfer the applied voltage to the floating gate and may hold the electrons in the floating gate. Furthermore, the flash memory device having the dielectric layer may have a high coupling ratio so as to prevent a loss of the applied voltage. Thus, the loss of the applied voltage may be reduced in accordance with an increase of the coupling ratio of the flash memory device.
The coupling ratio (R) is may be represented by the following equation (1).R=C1/(C1+C2)  (1)
In the above equation (1), C1 represents the capacitance of the dielectric layer, and C2 represents the capacitance of the tunnel oxide layer. Additionally, the capacitance of the dielectric layer C1 may be obtained by the following equation (2).C1=(∈×A)/T  (2)
In the above equation (2), ∈ denotes a dielectric constant of the dielectric layer, and A represents an area of the dielectric layer. Additionally, T indicates a thickness of the dielectric layer.
To increase the coupling ratio of the flash memory device, the dielectric layer may have a high dielectric constant ∈, a large area A and/or a thin thickness T. High coupling ratios may be achieved by employing a dielectric material formed using a high-k dielectric material such as tantalum oxide (Ta2O5), yttrium oxide (Y2O3), hafnium oxide (HfO2), zirconium oxide (ZrO2), niobium oxide (Nb2O5), barium titanate (BaTiO3) or strontium titanate (SrTiO3).
When the dielectric layer of the flash memory device is formed using hafnium oxide, ingredients in the dielectric layer may crystallize at a temperature of above about 300° C. thereby generating a leakage current from the dielectric layer. Thus, the use of hafnium oxide to form the dielectric layer of the flash memory device may not be advantageous.
Considering the above-mentioned problem, the dielectric layer of the flash memory device may be formed using zirconium oxide since zirconium oxide may have a relatively high crystalline temperature and/or a relatively thin equivalent oxide thickness (EOT). Examples of methods for forming a dielectric layer using zirconium oxide are discussed in U.S. Patent Application Publication No. 2003/0043637, U.S. Pat. No. 6,750,066 (issued to Cheung et al.) or U.S. Pat. No. 6,754,108 (issued to Forbes). U.S. Pat. No. 6,750,066 discusses a dielectric layer having a thickness of about 10 Å to about 200 Å using zirconium oxide.